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Disambiguation of "Taskin, Baris"

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A Novel Static D-Flip-Flop Topology for Low Swing Clocking.

, , , , and . ACM Great Lakes Symposium on VLSI, page 301-306. ACM, (2015)

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Baris Yanik

Taskin Tuna

Baris Ünver

Caroline Barisch

Baris Serifsoy

 

Other publications of authors with the same name

Low Voltage Clock Tree Synthesis with Local Gate Clusters., , , and . ACM Great Lakes Symposium on VLSI, page 99-104. ACM, (2019)Can You Trust Your Memory Trace? A Comparison of Memory Traces from Binary Instrumentation and Simulation., , , and . VLSID, page 135-140. IEEE Computer Society, (2015)Timing characterization of clock buffers for clock tree synthesis., , and . ICCD, page 230-236. IEEE Computer Society, (2014)A wirelessly powered system with charge recovery logic., , and . ICCD, page 505-510. IEEE Computer Society, (2015)SnackNoC: Processing in the Communication Layer., , , , and . HPCA, page 461-473. IEEE, (2020)Low Swing - Low Frequency Rotary Traveling Wave Oscillators., , , and . ISCAS, page 1-5. IEEE, (2019)A charge recovery logic system bus., and . SLIP, page 1-4. IEEE Computer Society, (2017)Towards Design Decisions for Genetic Algorithms in Clock Tree Synthesis., and . IGSC, page 1-6. IEEE, (2018)FinFET-Based Low-Swing Clocking., , , , and . JETC, 12 (2): 13:1-13:20 (2015)Performance optimization of single-phase level-sensitive circuits using time borrowing and non-zero clock skew., and . Timing Issues in the Specification and Synthesis of Digital Systems, page 111-118. ACM, (2002)