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25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications., , , , , , , , , and 20 other author(s). ISSCC, page 350-352. IEEE, (2021)New Battery Status Checking Method for Implantable Biomedical Applications., , , , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 292-300. Springer, (2006)A 0.31-1 GHz Fast-Corrected Duty-Cycle Corrector With Successive Approximation Register for DDR DRAM Applications., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (8): 1524-1528 (2012)22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme., , , , , , , , , and 25 other author(s). ISSCC, page 330-332. IEEE, (2020)Body Bias Generator for Leakage Power Reduction of Low-Voltage Digital Logic Circuits., , , , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 350-359. Springer, (2006)An Area-Efficient, Low-VDD, Highly Reliable Multi-Cell Antifuse System Fully Operative in DRAMs., , , , , , , , , and 2 other author(s). IEICE Trans. Electron., 94-C (10): 1690-1697 (2011)A low complexity, low power, programmable QRS detector based on wavelet transform for Implantable Pacemaker IC., , , , , and . SoCC, page 160-163. IEEE, (2006)A highly reliable multi-cell antifuse scheme using DRAM cell capacitors., , , , , , , , , and 1 other author(s). ESSCIRC, page 482-485. IEEE, (2010)