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Fast HEVC intra coding decision based on statistical cost and corner detection.

, , and . IWSSIP, page 1-5. IEEE, (2017)

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Customising Hardware Designs for Elliptic Curve Cryptography., , and . SAMOS, volume 3133 of Lecture Notes in Computer Science, page 274-283. Springer, (2004)An Efficient Application Specific Instruction Set Processor (ASIP) for Tensor Computation., , and . ASAP, page 37. IEEE, (2019)A hardware-based computational platform for Generalized Laguerre-Volterra MIMO model for neural activities., , , , , and . EMBC, page 7282-7285. IEEE, (2011)An FPGA-Based High-Performance Neural Ensemble Spiking Activity Simulator Utilizing Generalized Volterra Kernel and Complexity Analysis., , , , and . Journal of Circuits, Systems, and Computers, 25 (1): 1640004:1-1640004:21 (2016)A reconfigurable architecture for real-time prediction of neural activity., , , , and . ISCAS, page 1869-1872. IEEE, (2013)A σδ modulator using gain-Boost Class-C Inverter for Audio Applications., , , , , and . Journal of Circuits, Systems, and Computers, (2013)Reconfigurable Number Theoretic Transform architectures for cryptographic applications., , , and . FPT, page 308-311. IEEE, (2010)Automating custom-precision function evaluation for embedded processors., , , , and . CASES, page 22-31. ACM, (2005)Parallel architecture for DNA sequence inexact matching with Burrows-Wheeler Transform., , , , , , and . Microelectron. J., 44 (8): 670-682 (2013)Customizable elliptic curve cryptosystems., , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (9): 1048-1059 (2005)