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Diagnosis of path delay faults based on low-coverage tests.

, и . IET Comput. Digit. Tech., 4 (2): 89-103 (2010)

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Sudhakar Peddireddi

Padhmanand Sudhakar

Edamakanti Chandrakanth Reddy

Malgi Prasad Reddy

Martin Reddy

 

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Techniques to Construct (2, 1) Separating Systems from Linear Error-Correcting Codes., и . IEEE Trans. Computers, 25 (9): 945-949 (1976)On the Design of Testable Domino PLAs., и . ITC, стр. 567-573. IEEE Computer Society, (1985)On diagnosis of pattern-dependent delay faults., и . DAC, стр. 59-62. ACM, (2000)Cost-Effective Generation of Minimal Test Sets for Stuck-at Faults in Combinational Logic Circuits., , , и . DAC, стр. 102-106. ACM Press, (1993)Fault Simulation under the Multiple Observation Time Approach using Backward Implications., и . DAC, стр. 608-613. ACM Press, (1997)Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Test Subsequences., и . DAC, стр. 754-759. ACM Press, (1999)Proptest: A Property Based Test Pattern Generator for Sequential Circuits Using Test Compaction., , и . DAC, стр. 653-659. ACM Press, (1999)On Efficient Concurrent Fault Simulation for Synchronous Sequential Circuits., и . DAC, стр. 327-331. IEEE Computer Society Press, (1992)On Achieving a Complete Fault Coverage for Sequential Machines Using the Transition Fault Model., и . DAC, стр. 341-346. ACM, (1991)A Class of Graphs for Fault-Tolerant Processor Interconnections., и . ICDCS, стр. 448-460. IEEE Computer Society, (1984)