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Disambiguation of "Kim, Beomsup"

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Correction to Ä Third-Order$Sigma Delta $Modulator in 0.18-$muhboxm$CMOS With Calibrated Mixed-Mode Integrators".

, , and . IEEE J. Solid State Circuits, 40 (11): 2339 (2005)

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Ky ng Kim

Die Artikelstruktur in passiven zweisprachigen Wörterbüchern Deutsch-Koreanisch: Konzeption zur Erstellung eines zweisprachigen Lernerwörterbuchs Deutsch-Koreanisch. Uni Heidelberg, (2008)

Kim Gerber

Bongcheol Kim

Youngsang Kim

Ryong Kim

 

Other publications of authors with the same name

A DLL-Based Frequency Synthesizer with Selective Reuse of a Delay Cell Scheme for 2.4 GHz ISM Band., and . IEICE Trans. Electron., 88-C (1): 149-153 (2005)Non-Data-Aided Timing Recovery Algorithm for \pi/4-OPSK Modulated Signals., , , , and . ICC (1), page 392-396. IEEE, (2000)A 500-Mb/s quadruple data rate SDRAM interface using a skew cancellation technique., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 36 (4): 648-657 (2001)A low-noise fast-lock phase-locked loop with adaptive bandwidth control., and . IEEE J. Solid State Circuits, 35 (8): 1137-1145 (2000)A 330-MHz 15-b quadrature digital synthesizer/mixer in 0.25-μm CMOS., and . ESSCIRC, page 513-516. IEEE, (2003)A 5-GHz self-calibrated I/Q clock generator using a quadrature LC-VCO., , and . ISCAS (1), page 797-800. IEEE, (2003)PLL/DLL System Noise Analysis for Low Jitter Clock Synthesizer Design., , and . ISCAS, page 31-34. IEEE, (1994)A novel high-speed ring oscillator for multiphase clock generation using negative skewed delay scheme., , and . IEEE J. Solid State Circuits, 32 (2): 289-291 (1997)Low-jitter digital timing recovery techniques for CAP-based VDSL applications., and . IEEE J. Solid State Circuits, 38 (10): 1649-1656 (2003)A quadrature digital synthesizer/mixer architecture using fine/coarse coordinate rotation to achieve 14-b input, 15-b output, and 100-dBc SFDR., and . IEEE J. Solid State Circuits, 39 (11): 1853-1861 (2004)