Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime.

J. Shin, V. Zyuban, P. Bose, and T. Pinkston. ISCA, page 353-362. IEEE Computer Society, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

V Saile

V Geoffroy

V Ustinov

V Adams

V Fendrich

Other publications of authors with the same name

Inherently Lower-Power High-Performance Superscalar Architectures.V. Zyuban, and P. Kogge. IEEE Trans. Computers, 50 (3): 268-285 (2001)Unified architecture level energy-efficiency metric.V. Zyuban. ACM Great Lakes Symposium on VLSI, page 24-29. ACM, (2002)Design methodology for semi custom processor cores.V. Zyuban, S. Asaad, T. Fox, A. Haen, D. Littrell, and J. Moreno. ACM Great Lakes Symposium on VLSI, page 448-452. ACM, (2004)A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime.J. Shin, V. Zyuban, P. Bose, and T. Pinkston. ISCA, page 353-362. IEEE Computer Society, (2008)An innovative low-power high-performance programmable signal processor for digital communications.J. Moreno, V. Zyuban, U. Shvadron, F. Neeser, J. Derby, M. Ware, K. Kailas, A. Zaks, A. Geva, S. Ben-David and 6 other author(s). IBM J. Res. Dev., 47 (2-3): 299-326 (2003)Power reduction by aggressive synthesis design space exploration.M. Ziegler, G. Gristede, and V. Zyuban. ISLPED, page 421-426. IEEE, (2013)The opportunity cost of low power design: a case study in circuit tuning.M. Ziegler, V. Zyuban, G. Gristede, M. Vratonjic, and J. Friedrich. ISLPED, page 133-138. ACM, (2009)Unified methodology for resolving power-performance tradeoffs at the microarchitectural and circuit levels.V. Zyuban, and P. Strenski. ISLPED, page 166-171. ACM, (2002)Clocking strategies and scannable latches for low power appliacations.V. Zyuban, and D. Meltzer. ISLPED, page 346-351. ACM, (2001)POWER7TM local clocking and clocked storage elements.J. Warnock, L. Sigal, D. Wendel, K. Muller, J. Friedrich, V. Zyuban, E. Cannon, and A. KleinOsowski. ISSCC, page 178-179. IEEE, (2010)

BibSonomy

Disambiguation of "Zyuban, Victor V."

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime.

Please choose a person to relate this publication to

V Saile

V Geoffroy

V Ustinov

V Adams

V Fendrich

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zyuban, Victor V."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime.

Please choose a person to relate this publication to

V Saile

V Geoffroy

V Ustinov

V Adams

V Fendrich

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime.