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Massively Parallel Analog Computing: Ariadne's Thread Was Made of Memristors., , and . IEEE Trans. Emerg. Top. Comput., 6 (1): 145-155 (2018)Modeling Cycle-to-Cycle Variation in Memristors for In-Situ Unsupervised Trace-STDP Learning., , , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 71 (2): 627-631 (February 2024)eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex., , , , , , , and . J. Signal Process. Syst., 92 (11): 1323-1343 (2020)Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms., , , , and . ICECS, page 1-8. IEEE, (2023)DRRA-based Reconfigurable Architecture for Mixed-Radix FFT., , , and . VLSID, page 25-30. IEEE, (2023)eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex., , , , , , , , and . CoRR, (2019)A Memristor-Based Learning Engine for Synaptic Trace-Based Online Learning., , , , , , , , , and . IEEE Trans. Biomed. Circuits Syst., 17 (5): 1153-1165 (October 2023)Assessing Surface Runoff in Future Climate Conditions in Mountainous Catchments (Case Study: Klinovitikos Torrent, Central Greece)., and . HAICTA, volume 2761 of CEUR Workshop Proceedings, page 425-435. CEUR-WS.org, (2020)XbarSim: An educational simulation tool for memristive crossbar-based circuits., , and . ISCAS, page 1798-1801. IEEE, (2015)Optoelectronic Memristor Model for Optical Synaptic Circuit of Spiking Neural Networks., , , , , , , , , and . NEWCAS, page 1-5. IEEE, (2023)