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Disambiguation of "Park, Myeong-Jae"

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Fast and accurate event-driven simulation of mixed-signal systems with data supplementation.

, , , and . CICC, page 1-4. IEEE, (2011)

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Jae Ho Park

Eun-Jae Park

Jae Bum Park

Jae-young Park

Jae-Hyung Park

 

Other publications of authors with the same name

A 192-Gb 12-High 896-GB/s HBM3 DRAM With a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization., , , , , , , , , and 29 other author(s). IEEE J. Solid State Circuits, 58 (1): 256-269 (2023)Fast and accurate event-driven simulation of mixed-signal systems with data supplementation., , , and . CICC, page 1-4. IEEE, (2011)22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST., , , , , , , , , and 27 other author(s). ISSCC, page 334-336. IEEE, (2020)Present and Future, Challenges of High Bandwith Memory (HBM)., and . IMW, page 1-4. IEEE, (2024)Analog Circuit Design Automation via Sequential RL Agents and Gm/ID Methodology., , , , , , , , , and . IEEE Access, (2024)True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example., , , and . CICC, page 1-4. IEEE, (2012)A 5-Gbps 1.7 pJ/bit ditherless CDR with optimal phase interval detection., , , and . CICC, page 1-4. IEEE, (2012)A built-in self-test circuit for jitter tolerance measurement in high-speed wireline receivers., and . ITC, page 1-6. IEEE Computer Society, (2014)A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization., , , , , , , , , and 39 other author(s). ISSCC, page 444-446. IEEE, (2022)Time slot optimization algorithm for multisource energy harvesting systems., , , , and . ESSCIRC, page 499-502. IEEE, (2016)