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Disambiguation of "Kwon, Dae Hyun"

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A Dynamically Biased Multiband 2G/3G/4G Cellular Transmitter in 28 nm CMOS.

, , , , , , , , and . IEEE J. Solid State Circuits, 51 (5): 1096-1108 (2016)

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Dae-Joong Kwon

Dae-Hyun Yang

Dae Hyun Kim

Kwon-Hyun Lee

Hee Hyun

 

Other publications of authors with the same name

A 32-Gb/s PAM-4 Quarter-Rate Clock and Data Recovery Circuit With an Input Slew-Rate Tolerant Selective Transition Detector., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (2): 362-366 (2019)A Low-Power 28-Gb/s PAM-4MZM Driver With Level Pre-Distortion., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (3): 908-912 (2021)25.2 A 16Gb Sub-1V 7.14Gb/s/pin LPDDR5 SDRAM Applying a Mosaic Architecture with a Short-Feedback 1-Tap DFE, an FSS Bus with Low-Level Swing and an Adaptively Controlled Body Biasing in a 3rd-Generation 10nm DRAM., , , , , , , , , and 24 other author(s). ISSCC, page 346-348. IEEE, (2021)A Fast Digital Predistortion Algorithm for Radio-Frequency Power Amplifier Linearization With Loop Delay Compensation., , , and . J. Sel. Topics Signal Processing, 3 (3): 374-383 (2009)Digitally enhanced CMOS RF transmitter with integrated power amplifier. University of Illinois Urbana-Champaign, USA, (2010)A Low-Power 40-Gb/s Pre-Emphasis PAM-4 Transmitter With Toggling Serializers., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (3): 430-434 (2020)An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM With a Hybrid-Bank Architecture, Low Power, and Speed-Boosting Techniques., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 212-224 (2021)Digitally Equalized CMOS Transmitter Front-End With Integrated Power Amplifier., , , , and . IEEE J. Solid State Circuits, 45 (8): 1602-1614 (2010)13.3 A SAW-less reconfigurable multimode transmitter with a voltage-mode harmonic-reject mixer in 14nm FinFET CMOS., , , , , , and . ISSCC, page 220-221. IEEE, (2017)A Dynamically Biased Multiband 2G/3G/4G Cellular Transmitter in 28 nm CMOS., , , , , , , , and . IEEE J. Solid State Circuits, 51 (5): 1096-1108 (2016)