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A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping.

, , , , , , , and . IEEE J. Solid State Circuits, 56 (3): 739-749 (2021)

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A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping., , , , , , , and . IEEE J. Solid State Circuits, 56 (3): 739-749 (2021)A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 55 (12): 3248-3259 (2020)A 0.01mm2 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor., , , , , , , , and . ISSCC, page 64-66. IEEE, (2019)Digital hypertension management: clinical and cost outcomes of a pilot implementation of the OMRON hypertension management platform., , , , , , and . Frontiers Digit. Health, (March 2023)Modelling cancer mechanics across multiple length scales: from basic understanding to applications.. Monash University, Australia, (2021)Enhanced Homomorphic Encryption Scheme with Particle Swarm Optimization for Encryption of Cloud Data., , , and . HIS, volume 1179 of Advances in Intelligent Systems and Computing, page 291-298. Springer, (2019)10.4 A 3.7mW 12.5MHz 81dB-SNDR 4th-Order CTDSM with Single-OTA and 2nd-Order NS-SAR., , , , , , , and . ISSCC, page 170-172. IEEE, (2021)MAGICAL 1.0: An Open-Source Fully-Automated AMS Layout Synthesis Framework Verified With a 40-nm 1GS/s Δ∑ ADC., , , , , , and . CICC, page 1-2. IEEE, (2021)A SAR ADC with Reduced kT/C Noise by Decoupling Noise PSD and BW., , , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)A 0.37mm2 250kHz-BW 95dB-SNDR CTDSM with Low-Cost 2nd-order Vector-Quantizer DEM., , , , , , , and . CICC, page 1-2. IEEE, (2022)