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Enabling architectural innovations using non-volatile memory.

, , , , , , and . ACM Great Lakes Symposium on VLSI, page 439-444. ACM, (2011)

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Towards Resilient Micro-architectures: Datapath Reliability Enhancement Using STT-MRAM., , , and . ISVLSI, page 236-241. IEEE Computer Society, (2011)A Non-Uniform Grid Based Ground Plane Model for High Performance Nodes: The Impact of Heterogeneous Cores on Ground Voltage Gradient., , , and . ISVLSI, page 49-54. IEEE Computer Society, (2009)SCOC IP Cores for Custom Built Supercomputing Nodes., , , , , , , , , and 3 other author(s). ISVLSI, page 255-260. IEEE Computer Society, (2012)Compilation Accelerator on Silicon., , , , , , , , , and 3 other author(s). ISVLSI, page 267-272. IEEE Computer Society, (2012)Enabling architectural innovations using non-volatile memory., , , , , , and . ACM Great Lakes Symposium on VLSI, page 439-444. ACM, (2011)Design of energy-efficient circuits and systems using tunnel field effect transistors., , , , , , and . IET Circuits Devices Syst., 7 (5): 294-303 (2013)Ultra Low Power Circuit Design Using Tunnel FETs., , , , , and . ISVLSI, page 153-158. IEEE Computer Society, (2012)Custom Built Heterogeneous Multi-core Architectures (CUBEMACH): Breaking the conventions., , , , , and . IPDPS Workshops, page 1-15. IEEE, (2010)