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Deterministic Memory Hierarchy and Virtualization for Modern Multi-Core Embedded Systems.

, , , , , and . RTAS, page 1-14. IEEE, (2019)

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SchedGuard++: Protecting against Schedule Leaks Using Linux Containers on Multi-Core Processors., , , , , , , , and . ACM Trans. Cyber Phys. Syst., 7 (1): 6:1-6:25 (January 2023)Minimizing Cache Usage for Real-time Systems., , , , and . RTNS, page 200-211. ACM, (2023)EDF schedulability test for the E-TDL time-triggered framework., , and . SIES, page 73-82. IEEE, (2016)Co-Optimizing Cache Partitioning and Multi-Core Task Scheduling: Exploit Cache Sensitivity or Not?, , , , , and . RTSS, page 224-236. IEEE, (2023)Latency analysis of self-suspending task chains., , , , and . DATE, page 1299-1304. IEEE, (2022)Strict Partitioning for Sporadic Rigid Gang Tasks., , and . CoRR, (2024)Towards EDF schedulability analysis of an extended timing definition language., , and . SIGBED Review, 11 (3): 44-49 (2014)Latency analysis for data chains of real-time periodic tasks., , and . ETFA, page 360-367. IEEE, (2018)Deterministic Memory Hierarchy and Virtualization for Modern Multi-Core Embedded Systems., , , , , and . RTAS, page 1-14. IEEE, (2019)Conditions d'ordonnançabilité pour un langage dirigé par le temps. (Scheduling conditions for a time-triggered language).. Institut supérieur de l'aéronautique et de l'espace, Toulouse, France, (2015)