( en | de | ru )

 

Disambiguation of "Mangassarian, Hratch"

Author of the publication

copydeleteadd this publication to your clipboard
Leveraging dominators for preprocessing QBF.

, , , , and . DATE, page 1695-1700. IEEE Computer Society, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Hratch Papazian

 

Other publications of authors with the same name

Maximum Circuit Activity Estimation Using Pseudo-Boolean Satisfiability., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (2): 271-284 (2012)Debugging with dominance: On-the-fly RTL debug solution implications., , , and . ICCAD, page 587-594. IEEE Computer Society, (2011)Trace Compaction using SAT-based Reachability Analysis., , and . ASP-DAC, page 932-937. IEEE Computer Society, (2007)Non-solution implications using reverse domination in a modern SAT-based debugging environment., , , and . DATE, page 629-634. IEEE, (2012)A succinct memory model for automated design debugging., , and . ICCAD, page 137-142. IEEE Computer Society, (2008)On error tolerance and Engineering Change with Partially Programmable Circuits., , , , and . ASP-DAC, page 695-700. IEEE, (2012)Maximum circuit activity estimation using pseudo-boolean satisfiability., , , , and . DATE, page 1538-1543. EDA Consortium, San Jose, CA, USA, (2007)Robust QBF Encodings for Sequential Circuits with Applications to Verification, Debug, and Test., , and . IEEE Trans. Computers, 59 (7): 981-994 (2010)On Statistical Timing Analysis with Inter- and Intra-Die Variations., and . DATE, page 132-137. IEEE Computer Society, (2005)Improved Design Debugging Using Maximum Satisfiability., , , , and . FMCAD, page 13-19. IEEE Computer Society, (2007)