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March Pre: an Efficient Test for Resistive-Open Defects in the SRAM Pre-charge Circuit.

, , , , and . DDECS, page 256-261. IEEE Computer Society, (2006)

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Effect-cause intra-cell diagnosis at transistor level., , , , , , and . ISQED, page 460-467. IEEE, (2013)Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells., , , and . DTIS, page 1-5. IEEE, (2018)Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories., , , , , and . J. Electron. Test., 21 (5): 551-561 (2005)Emulating the Effects of Radiation-Induced Soft-Errors for the Reliability Assessment of Neural Networks., , , , , , , and . IEEE Trans. Emerg. Top. Comput., 10 (4): 1867-1882 (2022)A Survey on Deep Learning Resilience Assessment Methodologies., , , , , and . Computer, 56 (2): 57-66 (February 2023)A calculation method to estimate single event upset cross section., , , , , and . Microelectron. Reliab., (2017)A study of path delay variations in the presence of uncorrelated power and ground supply noise., , , , , and . DDECS, page 189-194. IEEE Computer Society, (2011)On using a SPICE-like TSTAC™ eFlash model for design and test., , , , , , , , and . DDECS, page 359-364. IEEE Computer Society, (2011)Optimized march test flow for detecting memory faults in SRAM devices under bit line coupling., , , , , , and . DDECS, page 353-358. IEEE Computer Society, (2011)Resistive-Open Defects in Embedded-SRAM Core Cells: Analysis and March Test Solution., , , , , and . Asian Test Symposium, page 266-271. IEEE Computer Society, (2004)