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Disambiguation of "Dohi, Keisuke"

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Pattern Compression of FAST Corner Detection for Efficient Hardware Implementation.

, , , and . FPL, page 478-481. IEEE Computer Society, (2011)

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Yumi Dohi

 

Other publications of authors with the same name

FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis., , , and . ARC, volume 8405 of Lecture Notes in Computer Science, page 191-196. Springer, (2014)A soft-core processor for finite field arithmetic with a variable word size accelerator., , , , and . FPL, page 1-4. IEEE, (2014)A study on power-scaling of triple-concatenated FEC for optical transport networks., , , , , and . ECOC, page 1-3. IEEE, (2015)Pattern Compression of FAST Corner Detection for Efficient Hardware Implementation., , , and . FPL, page 478-481. IEEE Computer Society, (2011)Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible GPUs., , , , and . ASAP, page 29-36. IEEE Computer Society, (2010)GPU implementation and optimization of electromagnetic simulation using the FDTD method for antenna designing., , , and . SIGARCH Comput. Archit. News, 39 (4): 26-31 (2011)Light-Weight Fine-Grain Dynamic Partial Reconfiguration on Xilinx FPGAs., , and . CISIS, volume 772 of Advances in Intelligent Systems and Computing, page 518-526. Springer, (2018)A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis., , , , and . SIGARCH Comput. Archit. News, 42 (4): 69-74 (2014)Deep-pipelined FPGA implementation of ellipse estimation for eye tracking., , , , and . FPL, page 458-463. IEEE, (2012)Performance Modeling of Stencil Computing on a Stream-Based FPGA Accelerator for Efficient Design Space Exploration., , , , and . IEICE Trans. Inf. Syst., 98-D (2): 298-308 (2015)