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Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules.

, , , and . ReConFig, page 436-441. IEEE Computer Society, (2010)

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Application-specific hardware accelerator for implementing recursive sorting algorithms., , , and . FPT, page 269-272. IEEE, (2010)Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules., , , and . ReConFig, page 436-441. IEEE Computer Society, (2010)Recursion and hierarchy in digital design and prototyping: a case study., , , , and . CompSysTech, page 45-50. ACM, (2011)Performance evaluation for FPGA-based processing of tree-like structures., , , and . ICECS, page 217-220. IEEE, (2012)EEG Analyzer prototype based on FPGA., , , , , , , and . ISPA, page 101-106. IEEE, (2011)High-performance hardware accelerators for sorting and managing priorities., , , and . DDECS, page 313-318. IEEE Computer Society, (2011)Parallel FPGA-Based Implementation of Recursive Sorting Algorithms., , , and . ReConFig, page 121-126. IEEE Computer Society, (2010)FPGA platform based digital design education., , and . CompSysTech, page 53. ACM, (2008)Implementation of address-based data sorting on different FPGA platforms., , , and . EWDTS, page 1-4. IEEE Computer Society, (2013)Advanced topics of FSM design using FPGA educational boards and web-based tools., , and . EWDTS, page 514-517. IEEE Computer Society, (2010)