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CHASM: Security Evaluation of Cache Mapping Schemes.

, , , , и . SAMOS, том 12471 из Lecture Notes in Computer Science, стр. 245-261. Springer, (2020)

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Nagendra Nath Mehrotra

Nagendra Narayan Thakur

Nagendra Bhargava Bharatula

 

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Understanding the Performance Benefit of Asynchronous Data Transfers in OpenCL Programs Executing on Media Processors., и . HiPC, стр. 135-144. IEEE Computer Society, (2015)ATTC (@C): Addressable-TLB based Translation Coherence., , , и . PACT, стр. 481-492. ACM, (2020)MicroRefresh: Minimizing Refresh Overhead in DRAM Caches., , и . MEMSYS, стр. 350-361. ACM, (2016)CHASM: Security Evaluation of Cache Mapping Schemes., , , , и . SAMOS, том 12471 из Lecture Notes in Computer Science, стр. 245-261. Springer, (2020)HETEROGENEOUS ARCHITECTURE FOR SPARSE DATA PROCESSING., , , , , и . IPDPS Workshops, стр. 6-15. IEEE, (2022)Method to Determine Contrariety between Architectures Containing Stratified Memory Mapped Register Sets., , , , , , и . ISED, стр. 210-214. IEEE Computer Society, (2014)CSALT: context switch aware large TLB., , , , и . MICRO, стр. 449-462. ACM, (2017)Rethinking TLB Designs in Virtualized Environments: A Very Large Part-of-Memory TLB., , , и . ISCA, стр. 469-480. ACM, (2017)ANATOMY: an analytical model of memory system performance., , , и . SIGMETRICS, стр. 505-517. ACM, (2014)ExPress: Simultaneously Achieving Storage, Execution and Energy Efficiencies in Moderately Sparse Matrix Computations., , , , , и . MEMSYS, стр. 46-60. ACM, (2020)