%0 Conference Paper %1 conf/vlsi/NishitaniIAIKS12 %A Nishitani, Yuki %A Inoue, Kazuki %A Amagasaki, Motoki %A Iida, Masahiro %A Kuga, Morihiro %A Sueyoshi, Toshinori %B VLSI-SoC %D 2012 %E Katkoori, Srinivas %E Guthaus, Matthew R. %E Coskun, Ayse K. %E Burg, Andreas %E Reis, Ricardo %I IEEE %K dblp %P 225-230 %T Evaluation of fault tolerant technique based on homogeneous FPGA architecture. %U http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2012.html#NishitaniIAIKS12 %@ 978-1-4673-2657-5

@inproceedings{conf/vlsi/NishitaniIAIKS12, added-at = {2022-09-06T00:00:00.000+0200}, author = {Nishitani, Yuki and Inoue, Kazuki and Amagasaki, Motoki and Iida, Masahiro and Kuga, Morihiro and Sueyoshi, Toshinori}, biburl = {https://www.bibsonomy.org/bibtex/2972ea3b4f729ab96659ecb6676f5102e/dblp}, booktitle = {VLSI-SoC}, crossref = {conf/vlsi/2012soc}, editor = {Katkoori, Srinivas and Guthaus, Matthew R. and Coskun, Ayse K. and Burg, Andreas and Reis, Ricardo}, ee = {https://doi.org/10.1109/VLSI-SoC.2012.6379034}, interhash = {8d7b789e1a80f7f41e5ee479e74bc614}, intrahash = {972ea3b4f729ab96659ecb6676f5102e}, isbn = {978-1-4673-2657-5}, keywords = {dblp}, pages = {225-230}, publisher = {IEEE}, timestamp = {2024-04-09T12:01:32.000+0200}, title = {Evaluation of fault tolerant technique based on homogeneous FPGA architecture.}, url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2012.html#NishitaniIAIKS12}, year = 2012 }