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Disambiguation of "Iida, Masahiro"

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Evaluation of fault tolerant technique based on homogeneous FPGA architecture.

, , , , , and . VLSI-SoC, page 225-230. IEEE, (2012)

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Masahiro Noguchi

Masahiro Ogawa

Ajumi Iida

Takashi Iida

Masahiro Yoshida

 

Other publications of authors with the same name

A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)., , , , , and . FPGA, page 271. ACM, (2013)Design Methodology.. Principles and Structures of FPGAs, Springer, (2018)A heuristic method of generating diameter 3 graphs for order/degree problem (invited paper)., and . NOCS, page 1-6. IEEE, (2016)Improving the Soft-error Tolerability of a Soft-core Processor on., , , , and . J. Next Gener. Inf. Technol., 2 (3): 35-48 (2011)An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture., , , , and . Int. J. Reconfigurable Comput., (2008)A 3D FPGA Architecture to Realize Simple Die Stacking., , , , and . IPSJ Trans. Syst. LSI Des. Methodol., (2015)Image Search System Based on Feature Vectors of Convolutional Neural Network., , and . TENCON, page 934-939. IEEE, (2020)Evaluation of fault tolerant technique based on homogeneous FPGA architecture., , , , , and . VLSI-SoC, page 225-230. IEEE, (2012)FPL Demo: An FPGA-IP Prototype Chip for MEC devices., , and . FPL, page 467. IEEE, (2022)An Easily Testable Routing Architecture and Efficient Test Technique., , , , and . FPL, page 291-294. IEEE Computer Society, (2011)