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Properties of Maximally Dominating Faults.

, and . Asian Test Symposium, page 106-111. IEEE Computer Society, (2004)

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On the Design of Testable Domino PLAs., and . ITC, page 567-573. IEEE Computer Society, (1985)Techniques to Construct (2, 1) Separating Systems from Linear Error-Correcting Codes., and . IEEE Trans. Computers, 25 (9): 945-949 (1976)Test Generation for Multiple State-Table Faults in Finite-State Machines., and . IEEE Trans. Computers, 46 (7): 783-794 (1997)A Storage-Based Built-In Test Pattern Generation Method for Scan Circuits Based on Partitioning and Reduction of a Precomputed Test Set., and . IEEE Trans. Computers, 51 (11): 1282-1293 (2002)On Finding a Minimal Functional Description of a Finite-State Machine for Test Generation for Adjacent Machines., and . IEEE Trans. Computers, 49 (1): 88-94 (2000)A Cone-Based Genetic Optimization Procedure for Test Generation and Its Application to n-Detections in Combinational Circuits., and . IEEE Trans. Computers, 48 (10): 1145-1152 (1999)Enumeration of Test Sequences in Increasing Chronological Order to Improve the Levels of Compaction Achieved by Vector Omission., and . IEEE Trans. Computers, 51 (7): 866-872 (2002)On Totally Self-Checking Checkers for Separable Codes., and . IEEE Trans. Computers, 26 (8): 737-744 (1977)A Fault-Tolerant Communication Architecture for Distributed Systems., and . IEEE Trans. Computers, 31 (9): 863-870 (1982)On Removing Redundancies from Synchronous Sequential Circuits with Synchronizing Sequences., and . IEEE Trans. Computers, 45 (1): 20-32 (1996)