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Disambiguation of "Raghavan, Praveen"

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Compilation Technique for Loop Overhead Minimization.

, , , , and . DSD, page 419-426. IEEE Computer Society, (2009)

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Raghavan Vallur

Praveen Konidala

Paurush Praveen

Sarada Raghavan

Raghavan Chinnadurai

 

Other publications of authors with the same name

Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals., , , , , , and . SAMOS, volume 4599 of Lecture Notes in Computer Science, page 322-332. Springer, (2007)Coarse-Grained Reconfigurable Array Architectures., , and . Handbook of Signal Processing Systems, Springer, (2013)Dimensioning for power and performance under 10nm: The limits of FinFETs scaling., , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Modeling FinFET metal gate stack resistance for 14nm node and beyond., , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors., , , , , , and . J. Signal Process. Syst., 61 (2): 157-179 (2010)Efficient Method to Generate an Energy Efficient Schedule Using Operation Shuffling., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (2): 604-612 (2008)A Scalable MIMO Detector Processor With Near-ASIC Energy Efficiency., , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (10): 1973-1986 (2015)System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform., , , , , , and . IEEE Embed. Syst. Lett., 6 (4): 85-88 (2014)Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes., , , , , , , , , and 5 other author(s). Microprocess. Microsystems, 39 (8): 1039-1051 (2015)A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors., , , , , , and . ARCS, volume 4415 of Lecture Notes in Computer Science, page 57-68. Springer, (2007)