Author of the publication

An efficient architecture for adaptive progressive thresholding.

, , , and . APCCAS (1), page 513-516. IEEE, (2002)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Preprocessing technique for accelerating reconfiguration of degradable VLSI arrays., , , and . ISCAS, page 2424-2427. IEEE, (2013)Algorithms for Reconfiguring NoC-Based Fault-Tolerant Multiprocessor Arrays., , , and . Journal of Circuits, Systems, and Computers, 28 (7): 1950111:1-1950111:24 (2019)FPGA-aware techniques for rapid generation of profitable custom instructions., , , and . Microprocess. Microsystems, 37 (3): 259-269 (2013)Selecting profitable custom instructions for reconfigurable processors., , , , and . J. Syst. Archit., 56 (8): 340-351 (2010)Nonparametric Technique Based High-Speed Road Surface Detection., , and . IEEE Trans. Intell. Transp. Syst., 16 (2): 874-884 (2015)Travel-Time Prediction of Bus Journey With Multiple Bus Trips., , , and . IEEE Trans. Intell. Transp. Syst., 20 (11): 4192-4205 (2019)Algorithmic aspects of graph reduction for hardware/software partitioning., , , , and . J. Supercomput., 71 (6): 2251-2274 (2015)Dynamically Growing Neural Network Architecture for Lifelong Deep Learning on the Edge., , , , and . FPL, page 262-268. IEEE, (2020)A Lightweight Detection Algorithm For Collision-Optimized Divide-and-Conquer Attacks., , , , and . IEEE Trans. Computers, 69 (11): 1694-1706 (2020)Instruction set customization for area-constrained FPGA designs., , , and . SoCC, page 329-334. IEEE, (2011)