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Disambiguation of "Diaz-Fortuny, Javier"

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New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors.

, , , , , , , and . DATE, page 150-155. IEEE, (2019)

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Joaquim Fortuny

Gonzalo Díaz Díaz

Carlos Diaz Cascajo

Leonardo Díaz

Diana Diaz

 

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The Role of Mobility Degradation in the BTI-Induced RO Aging in a 28-nm Bulk CMOS Technology: (Student paper)., , , , and . IRPS, page 1-6. IEEE, (2023)Statistical Characterization of Off-State Stress Degradation in Planar HKMG nFETs Using Device Arrays., , , , , , and . IRPS, page 8. IEEE, (2024)Machine Learning Unleashes Aging and Self-Heating Effects: From Transistors to Full Processor (Invited Paper)., , , and . IRPS, page 1-8. IEEE, (2024)Reliability challenges in Forksheet Devices: (Invited Paper)., , , , , , , , , and 2 other author(s). IRPS, page 1-8. IEEE, (2023)Using dedicated device arrays for the characterization of TDDB in a scaled HK/MG technology., , , , , and . IRPS, page 1-6. IEEE, (2023)Challenges and solutions to the defect-centric modeling and circuit simulation of time-dependent variability., , , , , , , and . IRPS, page 1-9. IEEE, (2023)TARS: A toolbox for statistical reliability modeling of CMOS devices., , , , , , and . SMACD, page 1-4. IEEE, (2017)A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging., , , , , , , , , and . SMACD, page 1-4. IEEE, (2017)Design Considerations of an SRAM Array for the Statistical Validation of Time-Dependent Variability Models., , , , , , , , , and 2 other author(s). SMACD, page 73-76. IEEE, (2018)Flexible Setup for the Measurement of CMOS Time-Dependent Variability With Array-Based Integrated Circuits., , , , , , , and . IEEE Trans. Instrum. Meas., 69 (3): 853-864 (2020)