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An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET.

C. Schmidt, J. Wright, Z. Wang, E. Chang, A. Ou, W. Bae, S. Huang, V. Milovanovic, A. Flynn, B. Richards, K. Asanovic, E. Alon, и B. Nikolic. IEEE J. Solid State Circuits, 57 (1): 140-152 (2022)

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Wang Wang

Linfang Wang

Investigation of the functions of 53BP1 in DNA demethylationL. Wang. Uni Marburg, (2009)

Lei Wang

Qingwei Wang

Hao Wang

Другие публикации лиц с тем же именем

A Generated 7GS/s 8b Time-Interleaved SAR ADC with 38.2dB SNDR at Nyquist in 16nm CMOS FinFET.J. Han, E. Chang, S. Bailey, Z. Wang, W. Bae, A. Wang, N. Narevsky, A. Whitcombe, P. Lu, B. Nikolic и 1 other автор(ы). CICC, стр. 1-4. IEEE, (2019)Optimization Model for Collaborative Overhaul Workshop Scheduling Problem of Multiple EMUs.W. Zhang, Z. Wang, Z. Jia, и H. Wang. HPCC/DSS/SmartCity/DependSys, стр. 1310-1317. IEEE, (2021)An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET.C. Schmidt, J. Wright, Z. Wang, E. Chang, A. Ou, W. Bae, S. Huang, V. Milovanovic, A. Flynn, B. Richards и 3 other автор(ы). IEEE J. Solid State Circuits, 57 (1): 140-152 (2022)BAG2: A process-portable framework for generator-based AMS circuit design.E. Chang, J. Han, W. Bae, Z. Wang, N. Narevsky, B. Nikolic, и E. Alon. CICC, стр. 1-8. IEEE, (2018)25Gb/s hybrid-integrated silicon photonic receiver with microring wavelength stabilization.K. Yu, C. Chen, C. Li, H. Li, A. Titriku, B. Wang, A. Shafik, Z. Wang, M. Fiorentino, P. Chiang и 1 other автор(ы). OFC, стр. 1-3. IEEE, (2015)8 An Output-Bandwidth-Optimized 200Gb/s PAM-4 100Gb/s NRZ Transmitter with 5-Tap FFE in 28nm CMOS.M. Choi, Z. Wang, K. Lee, K. Park, Z. Liu, A. Biswas, J. Han, и E. Alon. ISSCC, стр. 128-130. IEEE, (2021)A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow.Z. Wang, M. Choi, J. Wright, K. Lee, Z. Liu, B. Yin, J. Han, S. Du, и E. Alon. ISCAS, стр. 2881-2885. IEEE, (2022)A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET.A. Wang, W. Bae, J. Han, S. Bailey, O. Ocal, P. Rigge, Z. Wang, K. Ramchandran, E. Alon, и B. Nikolic. IEEE J. Solid State Circuits, 54 (7): 1993-2008 (2019)A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET.S. Bailey, J. Han, P. Rigge, R. Lin, E. Chang, H. Mao, Z. Wang, C. Markley, A. Izraelevitz, A. Wang и 21 other автор(ы). A-SSCC, стр. 285-288. IEEE, (2018)Optimizing the High-Level Maintenance Planning Problem of the Electric Multiple Unit Train Using a Modified Particle Swarm Optimization Algorithm.J. Wu, B. Lin, H. Wang, X. Zhang, Z. Wang, и J. Wang. Symmetry, 10 (8): 349 (2018)

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Wang Wang

Linfang Wang

Lei Wang

Qingwei Wang

Hao Wang

Другие публикации лиц с тем же именем

Disambiguation

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копироватьудалитьдобавить публикацию в буферЗапись сообществапосмотреть историю данной записиURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET.

Please choose a person to relate this publication to

Wang Wang

Linfang Wang

Lei Wang

Qingwei Wang

Hao Wang

Другие публикации лиц с тем же именем

Disambiguation