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Maximal diagnosis of interconnects of random access memories.

, , , and . IEEE Trans. Reliability, 52 (4): 423-434 (2003)

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Modeling Defect Spatial Distribution., and . IEEE Trans. Computers, 38 (4): 538-546 (1989)Measuring the timing jitter of ATE in the frequency domain., , , , , , , , , and . IEEE Trans. Instrumentation and Measurement, 55 (1): 280-289 (2006)Analysis and measurement of fault coverage in a combined ATE and BIST environment., , and . IEEE Trans. Instrumentation and Measurement, 53 (2): 300-307 (2004)Maximal diagnosis of interconnects of random access memories., , , and . IEEE Trans. Reliability, 52 (4): 423-434 (2003)Sequential diagnosis of processor array systems., , , and . IEEE Trans. Reliability, 53 (4): 487-498 (2004)Consensus With Dual Failure Modes., and . IEEE Trans. Parallel Distributed Syst., 2 (2): 214-222 (1991)Structural diagnosis of interconnects by coloring., , and . ACM Trans. Design Autom. Electr. Syst., 3 (2): 249-271 (1998)Design Verification of FPGA Implementations., , , , and . IEEE Des. Test Comput., 16 (2): 66-73 (1999)Guest editorial., and . J. Syst. Archit., 50 (5): 237-238 (2004)A XOR-Tree Based Technique for Constant Testability of Configurable FPGAs., , , and . Asian Test Symposium, page 248-253. IEEE Computer Society, (1997)