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26.5 Adaptive clocking in the POWER9™ processor for voltage droop protection.

, , , , , , , , , и . ISSCC, стр. 444-445. IEEE, (2017)

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Floyd von Filson

Monika Nölke Floyd

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Michael S Northcott

S Danischewski

 

Другие публикации лиц с тем же именем

A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor., , , , , , , , и . ISSCC, стр. 398-399. IEEE, (2007)Fault-Tolerant Design of the IBM Power6 Microprocessor., , , , , , и . IEEE Micro, 28 (2): 30-38 (2008)3.1 POWER9™: A processor family optimized for cognitive computing with 25Gb/s accelerator links and 16Gb/s PCIe Gen4., , , , , , , , , и 4 other автор(ы). ISSCC, стр. 50-51. IEEE, (2017)26.5 Adaptive clocking in the POWER9™ processor for voltage droop protection., , , , , , , , , и . ISSCC, стр. 444-445. IEEE, (2017)Runtime power reduction capability of the IBM POWER7+ chip., , , , , , , , , и . IBM J. Res. Dev., (2013)EnergyScale for IBM POWER6 microprocessor-based systems., , , , , , , , и . IBM J. Res. Dev., 51 (6): 775-786 (2007)Fault-tolerant design of the IBM pSeries 690 system using POWER4 processor technology., , , и . IBM J. Res. Dev., 46 (1): 77-86 (2002)Adaptive guardband scheduling to improve system-level efficiency of the POWER7+., , , , , и . MICRO, стр. 308-321. ACM, (2015)Accurate Fine-Grained Processor Power Proxies., , , , , , , и . MICRO, стр. 224-234. IEEE Computer Society, (2012)IBM POWER9 processor and system features for computing in the cognitive era., , , , , , , , , и 3 other автор(ы). IBM J. Res. Dev., 62 (4/5): 1:1-1:11 (2018)