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On Hazard-free Patterns for Fine-delay Fault Testing., , , and . ITC, page 213-222. IEEE Computer Society, (2004)Delay-fault testing and defects in deep sub-micron ICs-does critical resistance really mean anything?, , , and . ITC, page 95-104. IEEE Computer Society, (2000)VDD Ramp Testing for RF Circuits., , and . ITC, page 651-658. IEEE Computer Society, (2003)On Performance Testing with Path Delay Patterns., , and . VTS, page 29-34. IEEE Computer Society, (2007)Memory Testing Under Different Stress Conditions: An Industrial Evaluation., , , , , and . DATE, page 438-443. IEEE Computer Society, (2005)Functional vs. multi-VDD testing of RF circuits., , and . ITC, page 9. IEEE Computer Society, (2005)Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model., , , , , and . VTS, page 345-350. IEEE Computer Society, (2003)Multi-VDD Testing for Analog Circuits., , and . J. Electron. Test., 21 (3): 311-322 (2005)Memory testing improvements through different stress conditions., , , , , and . ESSCIRC, page 299-302. IEEE, (2005)Stuck-open fault diagnosis with stuck-at model., , , and . ETS, page 182-187. IEEE Computer Society, (2005)