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Energy-Efficient Frame-Buffer Architecture and It's Control Schemes for ONU Power Reduction., , , , , and . GLOBECOM, page 1-5. IEEE, (2011)Lagopus FPGA - A reprogrammable data plane for high-performance software SDN switches., , , and . Hot Chips Symposium, page 1. IEEE, (2015)Hash-table and balanced-tree based FIB architecture for CCN routers., , , , , , and . ISOCC, page 67-68. IEEE, (2016)Extendable point-to-multi-point protocol processor for 10G-EPON MAC SoCs., , , , , , and . ISCAS, page 1464-1467. IEEE, (2012)Accelerating SDN/NFV with Transparent Offloading Architecture., , , , and . ONS, USENIX Association, (2014)An FPGA-Based Accelerator for the 2D Implicit FDM and Its Application to Heat Conduction Simulations (Abstract Only)., , , , and . FPGA, page 266. ACM, (2015)Software-Hardware-Cooperative Protocol Processor for Extendable 10G-EPON MAC Chip., , , , , , , and . IEICE Trans. Electron., 98-C (1): 45-52 (2015)Flow Cache Cleansing with FPGA Hash Pipe for Highly Stabilized Software Data Plane., , , , , , , , , and . HPSR, page 1-6. IEEE, (2018)