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Disambiguation of "Linten, Dimitri"

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Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies.

, , , , , , , , , , , , , , and . ISSCC, page 528-529. IEEE, (2008)

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Claudia Simone Linten

Dimitri Barski

Dimitri Hartl

Dimitri Chronopulos

Thomas Dimitri

 

Other publications of authors with the same name

ESD protection diodes in optical interposer technology., , , , , , and . ICICDT, page 1-4. IEEE, (2015)Physics-based device aging modelling framework for accurate circuit reliability assessment., , , , , , , , , and . IRPS, page 1-6. IEEE, (2021)Reliability challenges in Forksheet Devices: (Invited Paper)., , , , , , , , , and 2 other author(s). IRPS, page 1-8. IEEE, (2023)Processing active devices on Si interposer and impact on cost., , , , , , , , , and . 3DIC, page TS11.2.1-TS11.2.4. IEEE, (2015)ESD diodes with Si/SiGe superlattice I/O finFET architecture in a vertically stacked horizontal nanowire technology., , , , and . ESSDERC, page 194-197. IEEE, (2018)Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown., , , , , , , , , and 1 other author(s). IRPS, page 5-1. IEEE, (2018)Self-heating-aware CMOS reliability characterization using degradation maps., , , , , , , and . IRPS, page 2. IEEE, (2018)Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps., , , , , , and . IRPS, page 5. IEEE, (2018)Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices., , , , , , , , , and 6 other author(s). IRPS, page 1-8. IEEE, (2019)Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies., , , , , , , , , and 10 other author(s). IRPS, page 1-6. IEEE, (2021)