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A Low-Flicker-Noise 30-GHz Class-F23 Oscillator in 28-nm CMOS Using Implicit Resonance and Explicit Common-Mode Return Path., , and . IEEE J. Solid State Circuits, 53 (7): 1977-1987 (2018)A 30-GHz class-F23 oscillator in 28nm CMOS using harmonic extraction and achieving 120 kHz 1/f3 corner., , and . ESSCIRC, page 87-90. IEEE, (2017)Dickson-Charge-Pump-Based Voltage-to-Time Conversion for Time-Based ADCs in 28-nm CMOS., , , , and . IEEE Open J. Circuits Syst., (2021)28 GHz Quadrature Frequency Generation Exploiting Injection-Locked Harmonic Extractors for 5G Communications., , , and . NEWCAS, page 1-4. IEEE, (2019)An LC-DCO based synthesizable injection-locked PLL with an FoM of -250.3dB., , , , , and . ESSCIRC, page 197-200. IEEE, (2016)A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS., , , , , , , , , and 1 other author(s). ISSCC, page 256-258. IEEE, (2019)DTC-Assisted All-Digital Phase-Locked Loop Exploiting Hybrid Time/Voltage Phase Digitization., , , , and . APCCAS, page 81-84. IEEE, (2019)Flicker Phase-Noise Reduction Using Gate-Drain Phase Shift in Transformer-Based Oscillators., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (3): 973-984 (2022)A Sub-Harmonic Injection-Locked Quadrature Frequency Synthesizer With Frequency Calibration Scheme for Millimeter-Wave TDD Transceivers., , , , and . IEEE J. Solid State Circuits, 48 (7): 1710-1720 (2013)A dual-loop injection-locked PLL with all-digital background calibration system for on-chip clock generation., , , , , and . ASP-DAC, page 21-22. IEEE, (2014)