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Disambiguation of "Garside, Jim D."

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Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip.

, , , , , , , , and . ARITH, page 37-44. IEEE, (2018)

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Jamie Garside

jim halo

Jim Wilenius

Jim Kallarackal

Jim Tsen

 

Other publications of authors with the same name

The Amulet chips: Architectural development for asynchronous microprocessors., , , and . ICECS, page 343-346. IEEE, (2009)AMULET1: A Micropipelined ARM., , , , and . COMPCON, page 476-485. IEEE Computer Society, (1994)An asynchronous copy-back cache architecture., , and . Microprocess. Microsystems, 27 (10): 485-500 (2003)Parallel Distribution of an Inner Hair Cell and Auditory Nerve Model for Real-Time Application., , , , and . IEEE Trans. Biomed. Circuits Syst., 12 (5): 1018-1026 (2018)Analysis of software and hardware-accelerated approaches to the simulation of unconventional interconnection networks., , , , , and . Simul. Model. Pract. Theory, (2020)Optimised Synthesis of Asynchronous Elastic Dataflows by Leveraging Clocked EDA., , , and . DSD, page 607-614. IEEE Computer Society, (2014)An Asynchronous Victim Cache., , and . DSD, page 4-11. IEEE Computer Society, (2002)An Asynchronous SDM Network-on-Chip Tolerating Permanent Faults., , , , and . ASYNC, page 9-16. IEEE Computer Society, (2014)AMULET3i Cache Architecture., and . ASYNC, page 152-161. IEEE Computer Society, (2001)Dynamic voltage and frequency scaling for neuromorphic many-core systems., , , , , , , , , and 9 other author(s). ISCAS, page 1-4. IEEE, (2017)