( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs).

, , , , , , , , , , , , , , и . IEEE Des. Test, 41 (1): 70-80 (февраля 2024)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Chaitali Chakrabarti

Subhadip Chakrabarti

Gopa Chakrabarti

Romon Chakrabarti

Sudhir Kumar Chakrabarti

 

Другие публикации лиц с тем же именем

Minimizing Area and Energy of Deep Learning Hardware Design Using Collective Low Precision and Structured Compression., , , , , и . CoRR, (2018)High sample rate array architectures for median filters.. IEEE Trans. Signal Process., 42 (3): 707-712 (1994)Articulation constrained learning with application to speech emotion recognition., , , , и . EURASIP J. Audio Speech Music. Process., (2019)Data storage time sensitive ECC schemes for MLC NAND Flash memories., , , и . ICASSP, стр. 2513-2517. IEEE, (2013)Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory., , , , , , , , , и 3 other автор(ы). IEEE J. Solid State Circuits, 57 (4): 986-998 (2022)A low power scheduling scheme with resources operating at multiple voltages., и . IEEE Trans. Very Large Scale Integr. Syst., 10 (1): 6-14 (2002)Interconnect-Aware Area and Energy Optimization for In-Memory Acceleration of DNNs., , , , , и . IEEE Des. Test, 37 (6): 79-87 (2020)Automated Parallel Kernel Extraction from Dynamic Application Traces., , и . CoRR, (2020)T-BFA: Targeted Bit-Flip Adversarial Weight Attack., , , , , и . IEEE Trans. Pattern Anal. Mach. Intell., 44 (11): 7928-7939 (2022)Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks., , , , , и . ACM J. Emerg. Technol. Comput. Syst., 18 (2): 34:1-34:22 (2022)