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Systematic design flow for dynamic data management in visual texture decoder of MPEG-4., , , , , , and . ISCAS, IEEE, (2006)HARPA: Solutions for dependable performance under physically induced performance variability., , , , , , , , , and 5 other author(s). SAMOS, page 270-277. IEEE, (2015)A framework for exploring alternative fault-tolerant schemes targeting 3-D reconfigurable architectures., , and . SAMOS, page 336-341. IEEE, (2016)A high performance data-path to accelerate DSP kernels., , , , and . ICECS, page 495-498. IEEE, (2004)Quick_Hotspot: A Software Supported Methodology for Supporting Run-Time Thermal Analysis at MPSoC Designs., , and . ARCS Workshops, VDE-Verlag, (2011)A low-cost fault tolerant solution targeting to commercial FPGA devices., and . AHS, page 46-53. IEEE, (2012)Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size., , , , and . ISCAS (2), page 73-76. IEEE, (2003)A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems., , , , and . ISCAS (5), page 129-132. IEEE, (2003)Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems., , , , , and . DATE, page 874-875. European Design and Automation Association, Leuven, Belgium, (2006)A High-Level Mapping Algorithm Targeting 3D NoC Architectures with Multiple Vdd., , and . ISVLSI, page 444-445. IEEE Computer Society, (2010)