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A 1.5-V 75-dB dynamic range third-order Gm-C filter integrated in a 0.18-μm standard digital CMOS process., and . IEEE J. Solid State Circuits, 38 (7): 1189-1197 (2003)Design of high-Q varactors for low-power wireless applications using a standard CMOS process., , , and . IEEE J. Solid State Circuits, 35 (3): 337-345 (2000)A micropower class-AB CMOS log-domain filter for DECT applications., and . IEEE J. Solid State Circuits, 36 (7): 1067-1075 (2001)Design and Applications of Approximate Circuits by Gate-Level Pruning., , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (5): 1694-1702 (2017)Experimental Verification of the Impact of Analog CMS on CIS Readout Noise., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (3): 774-784 (2020)Parsimonious Circuits for Error-Tolerant Applications through Probabilistic Logic Minimization., , , and . PATMOS, volume 6951 of Lecture Notes in Computer Science, page 204-213. Springer, (2011)A 1.2 V BiCMOS companding current-mode integrator for ΣΔ-modulators., and . ICECS, page 235-238. IEEE, (1996)A low-power carry cut-back approximate adder with fixed-point implementation and floating-point precision., , and . DAC, page 127:1-127:6. ACM, (2016)MEMS-based all-digital frequency synthesis for ultralow-power radio for WBAN and WSN applications., , and . ISCAS, page 157-160. IEEE, (2011)A 60 GHz QDCO with 11 GHz Seamless Tuning for Low-Power FMCW Radars in 22-nm FDSOI., , , and . ESSCIRC, page 291-294. IEEE, (2021)