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Другие публикации лиц с тем же именем

A Test Compaction Oriented Don't Care Identification Method Based on X-bit Distribution., , , и . IEICE Trans. Inf. Syst., 96-D (9): 1994-2002 (2013)VCore-based design methodology., , , , , , и . ASP-DAC, стр. 441-445. ACM, (2003)An Estimation Method of Defect Types Using Artificial Neural Networks and Fault Detection Information., , , , и . DFT, стр. 1-6. IEEE, (2023)A Block Partitioning Method for Region Exhaustive Test to Reduce the Number of Test Patterns and Improve Gate Exhaustive Fault Coverage., , , и . DFT, стр. 1-6. IEEE, (2023)CRLock: A SAT and FALL Attacks Resistant Logic Locking Method at Register Transfer Level., , , и . DFT, стр. 1-6. IEEE, (2022)A State Reduction Method for Non-Scan Based FSM Testing with Don't Care Inputs Identification Technique., , и . Asian Test Symposium, стр. 55-60. IEEE Computer Society, (2002)A DFT Selection Method for Reducing Test Application Time of System-on-Chips., , , , и . Asian Test Symposium, стр. 412-417. IEEE Computer Society, (2003)An Effective Design for Hierarchical Test Generation Based on Strong Testability., , , , и . Asian Test Symposium, стр. 288-293. IEEE Computer Society, (2005)A State Assignment Method to Improve Transition Fault Coverage for Controllers., , , и . DFT, стр. 1-4. IEEE, (2019)A DFT Selection Method for Reducing Test Application Time of System-on-Chips., , , , и . IEICE Trans. Inf. Syst., 87-D (3): 609-619 (2004)