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Disambiguation of "Drake, Alan J."

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Active Guardband Management in Power7+ to Save Energy and Maintain Reliability.

, , , , , , , and . IEEE Micro, 33 (4): 35-45 (2013)

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Alan J Cienki

Alan J Kallir

Susanne Drake

Indre Drake

Harold Drake

 

Other publications of authors with the same name

Introducing the Adaptive Energy Management Features of the Power7 Chip., , , , , , , , , and 1 other author(s). IEEE Micro, 31 (2): 60-75 (2011)CGaAs PowerPC FXU., , , , , , , and . DAC, page 730-735. ACM, (2000)Resonant clocking using distributed parasitic capacitance., , , , and . CICC, page 647-650. IEEE, (2003)A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor., , , , , , , , and . ISSCC, page 398-399. IEEE, (2007)Runtime power reduction capability of the IBM POWER7+ chip., , , , , , , , , and . IBM J. Res. Dev., (2013)A microprocessor design project in an introductory VLSI course., , , and . IEEE Trans. Educ., 43 (3): 353-361 (2000)Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI., , and . VLSI-SOC, page 263-. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Active Guardband Management in Power7+ to Save Energy and Maintain Reliability., , , , , , , and . IEEE Micro, 33 (4): 35-45 (2013)Two-dimensional position detection system with MEMS accelerometers, readout circuitry, and microprocessor for padless mouse applications., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (10): 1167-1178 (2005)Design Considerations for Reconfigurable Delay Circuit to Emulate System Critical Paths., , , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (11): 2714-2718 (2015)