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A Novel FPGA Implementation of the NAND-PUF with Minimal Resource Usage and High Reliability., and . Cryptogr., 7 (2): 18 (June 2023)A Novel Ultra-Compact FPGA PUF: The DD-PUF., , and . Cryptogr., 5 (3): 23 (2021)Design-oriented models for quick estimation of path delay variability via the fan-out-of-4 metric., , and . ISCAS, page 1-4. IEEE, (2017)Leakage Power Analysis attacks against a bit slice implementation of the Serpent block cipher., , , and . MIXDES, page 241-246. IEEE, (2014)Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications., , , and . IEEE Access, (2024)A Biasing Approach to Design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs., , , and . IEEE Access, (2022)Klessydra-T: Designing Vector Coprocessors for Multithreaded Edge-Computing Cores., , , , , and . IEEE Micro, 41 (2): 64-71 (2021)A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers., , , and . IEEE Access, (2022)Exploiting the DD-Cell as an Ultra-Compact Entropy Source for an FPGA-Based Re-Configurable PUF-TRNG Architecture., and . IEEE Access, (2023)Correlations between Structural CNS Damage and Functional MRI Changes in Primary Progressive MS., , , , , , , and . NeuroImage, 15 (3): 537-546 (2002)