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Disambiguation of "Mayahinia, Mahta"

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Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM.

, , , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (12): 5327-5332 (2022)

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Voltage Tuning for Reliable Computation in Emerging Resistive Memories., , and . VTS, page 1-7. IEEE, (2022)Special Session - Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications., , , , , , , , , and 6 other author(s). CASES, page 11-20. ACM/IEEE, (2023)Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management., , , , , , , , and . VTS, page 1-5. IEEE, (2024)Timing-accurate simulation framework for NVM-based compute-in-memory architecture exploration., , , and . it Inf. Technol., 65 (1-2): 13-29 (May 2023)Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM., , , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (12): 5327-5332 (2022)A failure analysis framework of ReRAM In-Memory Logic operations., , , , , , , and . ITC-Asia, page 67-72. IEEE, (2022)Design-time Reference Current Generation for Robust Spintronic-based Neuromorphic Architecture., , , , and . ACM J. Emerg. Technol. Comput. Syst., 20 (1): 2:1-2:20 (January 2024)Power Side-Channel Attacks and Countermeasures on Computation-in-Memory Architectures and Technologies., , , , , , and . ETS, page 1-6. IEEE, (2023)Emerging Interconnect Exploration for SRAM Application Using Nonconventional H-Tree and Center-Pin Access., , , , , , , and . ISQED, page 1. IEEE, (2023)Analyzing and Mitigating Sensing Failures in Spintronic-based Computing in Memory., , and . ITC, page 268-277. IEEE, (2021)