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Disambiguation of "Nepal, Kundan"

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A Cost Effective Approach for Online Error Detection Using Invariant Relationships.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (5): 788-801 (2010)

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Santosh Nepal

Santosh Nepal

Ranjita Nepal

 

Other publications of authors with the same name

Enhancing online error detection through area-efficient multi-site implications., , , , and . VTS, page 241-246. IEEE Computer Society, (2011)Cost-Effective, Re-Configurable Cluster Approach for Resource Constricted FPGA Based Machine Learning and AI Applications., , , and . CCWC, page 228-233. IEEE, (2020)Symbolic failure analysis of complex CMOS circuits due to excessive leakage current and charge sharing., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (4): 502-515 (2005)Improving the testability and reliability of sequential circuits with invariant logic., , , and . ACM Great Lakes Symposium on VLSI, page 131-134. ACM, (2010)MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits., , , , and . IEEE Micro, 26 (5): 19-27 (2006)Interactive presentation: Techniques for designing noise-tolerant multi-level combinational circuits., , , , and . DATE, page 576-581. EDA Consortium, San Jose, CA, USA, (2007)Designing MRF based error correcting circuits for memory elements., , , , and . DATE, page 792-793. European Design and Automation Association, Leuven, Belgium, (2006)Detecting errors using multi-cycle invariance information., , , and . DATE, page 791-796. IEEE, (2009)True Three-Valued Ternary Content Addressable Memory Cell Based On Ambipolar Carbon Nanotube Transistors., and . Journal of Circuits, Systems, and Computers, 28 (5): 1950085:1-1950085:18 (2019)Using Platform FPGAs for Fault Emulation and Test-set Generation to Detect Stuck-at Faults., and . J. Comput., 6 (11): 2335-2344 (2011)