( en | de | ru )

 

Disambiguation of "Bahar, R. Iris"

Author of the publication

copydeleteadd this publication to your clipboard
A Cost Effective Approach for Online Error Detection Using Invariant Relationships.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (5): 788-801 (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Bahar Haghanipour

Kayvan Baharmast

Cengiz Iristay

Aida Baharuddin

Bahar Hadzaad

Genexpressionen der Cytochrome P450 1B1 und 2E1 in Abhängigkeit einer PAH-Einwirkung infolge Rauchens sowie der individuellen Suszeptibilität. Uni Gießen, (2009)
 

Other publications of authors with the same name

ABACUS: A technique for automated behavioral synthesis of approximate computing circuits., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Hardware acceleration of feature detection and description algorithms on low-power embedded platforms., , , , and . FPL, page 1-9. IEEE, (2016)Temperature-Insensitive Dual- Vth Synthesis for Nanometer CMOS Technologies Under Inverse Temperature Dependence., , , and . IEEE Trans. Very Large Scale Integr. Syst., 18 (11): 1608-1620 (2010)Fast Design Exploration for Performance, Power and Accuracy Tradeoffs in FPGA-Based Accelerators., , , and . ACM Trans. Reconfigurable Technol. Syst., 7 (1): 4:1-4:22 (2014)Architectures for Silicon Nanoelectronics and Beyond., , , , , , , and . Computer, 40 (1): 25-33 (2007)Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (10): 1101-1115 (1997)Understanding the Impact of Precision Quantization on the Accuracy and Energy of Neural Networks., , , , and . CoRR, (2016)CMOS dynamic power estimation based on collapsible current source transistor modeling., , , , , and . ISLPD, page 111-116. ACM, (1995)Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack., , , , , , and . J. Electron. Test., 35 (6): 887-900 (2019)Concurrent Data Structures with Near-Data-Processing: an Architecture-Aware Implementation., , , , and . SPAA, page 297-308. ACM, (2019)