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Design and implementation of a two-dimensional sound field solver based on the Digital Huygens' Model.

, , , , , and . Microprocess. Microsystems, 38 (3): 216-225 (2014)

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A FPGA implementation of the two-dimensional Digital Huygens' Model., , , , , , , and . FPT, page 304-307. IEEE, (2010)A Hardware-oriented Object Model for Java in an Embedded Processor.. Microprocess. Microsystems, (2018)Design and implementation of a two-dimensional sound field solver based on the Digital Huygens' Model., , , , , and . Microprocess. Microsystems, 38 (3): 216-225 (2014)Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage., , , , , , and . FPT, page 1-4. IEEE, (2022)An Extensive Hardware/Software Co-design on a Descriptor-Based Embedded Java Processor., , , and . ICYCS, page 142-147. IEEE Computer Society, (2008)Performance Evaluation of a Toolkit for Sparse Tensor Decomposition., and . HPDC (Posters/Doctoral Consortium), page 5-6. ACM, (2018)A Novel JAVA Processor for Embedded Devices., , , , and . SAMOS, volume 3553 of Lecture Notes in Computer Science, page 112-121. Springer, (2005)An energy-efficient FPGA-based matrix multiplier., and . ICECS, page 514-517. IEEE, (2017)Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation., , , , , and . IPDPS Workshops, page 639-646. IEEE, (2022)The Cost of Flexibility: Embedded versus Discrete Routers in CGRAs for HPC., , , , , and . CLUSTER, page 347-356. IEEE, (2022)