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Disambiguation of "Ho, Tsung-Yi"

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Hamming-distance-based valve-switching optimization for control-layer multiplexing in flow-based microfluidic biochips.

, , , , , , and . ASP-DAC, page 524-529. IEEE, (2017)

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Tsung Ming Ho

Kun-ho Yi

Kun Ho Yi

Ky ng-ho Yi

Tsing-Tshih Tsung

 

Other publications of authors with the same name

Bus-driven floorplanning with bus pin assignment and deviation minimization., and . Integr., 45 (4): 405-426 (2012)Guest Editors' Introduction: Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip., and . IEEE Des. Test, 32 (6): 6-7 (2015)Storage and Caching: Synthesis of Flow-Based Microfluidic Biochips., , , and . IEEE Des. Test, 32 (6): 69-75 (2015)A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (12): 1786-1799 (2011)Lookup Table-Based Fast Reliability-Aware Sample Preparation Using Digital Microfluidic Biochips., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2708-2721 (2020)Post-Route Refinement for High-Frequency PCBs Considering Meander Segment Alleviation., , , and . CoRR, (2017)Load-balanced clock tree synthesis with adjustable delay buffer insertion for clock skew reduction in multiple dynamic supply voltage designs., , , and . ACM Trans. Design Autom. Electr. Syst., 17 (3): 34:1-34:22 (2012)Reliability-aware synthesis for flow-based microfluidic biochips by dynamic-device mapping., , , and . DAC, page 141:1-141:6. ACM, (2015)Timing-aware clock gating of pulsed-latch circuits for low power design., and . VLSI-DAT, page 1-4. IEEE, (2013)A nonlinear optimization methodology for resistor matching in analog integrated circuits., , and . VLSI-DAT, page 1-4. IEEE, (2012)