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Disambiguation of "Martos, David Guerrero"

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Logic-Level Fast Current Simulation for Digital CMOS Circuits.

, , , , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 425-435. Springer, (2005)

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Andreas Martos

Lilián Guerrero

Pablo Guerrero

Mariano Guerrero

Sonia Guerrero

 

Other publications of authors with the same name

Using the complement of the cosine to compute trigonometric functions., , , , , , and . EURASIP J. Adv. Signal Process., 2020 (1): 1-21 (2020)Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates., , , , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 389-398. Springer, (2008)Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements., , , , , , and . IES, page 1-7. IEEE, (2006)Accurate Logic-Level Current Estimation for Digital CMOS Circuits., , , , , , and . J. Low Power Electron., 2 (1): 87-94 (2006)Improving the Performance of Static CMOS Gates by Using Independent Bodies., , , , , , and . J. Low Power Electron., 3 (1): 70-77 (2007)An Integrated Digital System Design Framework With On-Chip Functional Verification and Performance Evaluation., , , , , and . IEEE Access, (2021)Address-encoded byte order., , , , , , , and . Microprocess. Microsystems, (2020)Studying the Viability of Static Complementary Metal-Oxide-Semiconductor Gates with a Large Number of Inputs When Using Separate Transistor Wells., , , , , , and . J. Low Power Electron., 7 (3): 444-452 (2011)Internode: Internal Node Logic Computational Model., , , , , and . Annual Simulation Symposium, page 241-248. IEEE Computer Society, (2003)Minimalistic SDHC-SPI hardware reader module for boot loader applications., , , , , and . Microelectron. J., (2017)