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Disambiguation of "Díaz, Manuel Jesús Bellido"

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Improving the Performance of Static CMOS Gates by Using Independent Bodies.

, , , , , , and . J. Low Power Electron., 3 (1): 70-77 (2007)

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Jesús Díaz y Díaz

Manuel Jiménez Díaz

Jesus-Enrique Díaz-Herrera

Juan Manuel Díaz Yarto

Pedro Miguel d' Jesús Montilva

 

Other publications of authors with the same name

IRIS: An embedded secure boot for IoT devices., , , , and . Internet Things, (October 2023)Accurate Logic-Level Current Estimation for Digital CMOS Circuits., , , , , , and . J. Low Power Electron., 2 (1): 87-94 (2006)Improving the Performance of Static CMOS Gates by Using Independent Bodies., , , , , , and . J. Low Power Electron., 3 (1): 70-77 (2007)Design and implementation of a suitable core for on-chip long-term verification., , , , , and . SIES, page 234-237. IEEE, (2010)Using the complement of the cosine to compute trigonometric functions., , , , , , and . EURASIP J. Adv. Signal Process., 2020 (1): 1-21 (2020)Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation., , , , and . IEEE Trans. Instrum. Meas., 60 (12): 3961-3963 (2011)Application of Internode Model to Global Power Consumption Estimation in SCMOS Gates., , , , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 337-347. Springer, (2005)Logic-Level Fast Current Simulation for Digital CMOS Circuits., , , , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 425-435. Springer, (2005)Minimalistic SDHC-SPI hardware reader module for boot loader applications., , , , , and . Microelectron. J., (2017)An Integrated Digital System Design Framework With On-Chip Functional Verification and Performance Evaluation., , , , , and . IEEE Access, (2021)