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Logic-Level Fast Current Simulation for Digital CMOS Circuits.

, , , , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 425-435. Springer, (2005)

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Design of a FFT/IFFT module as an IP core suitable for embedded systems., , , , , , , and . SIES, page 337-340. IEEE, (2007)Network Time Synchronization: A Full Hardware Approach., , and . PATMOS, volume 7606 of Lecture Notes in Computer Science, page 225-234. Springer, (2012)Application of Internode Model to Global Power Consumption Estimation in SCMOS Gates., , , , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 337-347. Springer, (2005)Logic-Level Fast Current Simulation for Digital CMOS Circuits., , , , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 425-435. Springer, (2005)Long-term on-chip verification of systems with logical events scattered in time., , , , , and . Microprocess. Microsystems, 36 (5): 402-408 (2012)Design and implementation of a suitable core for on-chip long-term verification., , , , , and . SIES, page 234-237. IEEE, (2010)Using the complement of the cosine to compute trigonometric functions., , , , , , and . EURASIP J. Adv. Signal Process., 2020 (1): 1-21 (2020)Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates., , , , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 389-398. Springer, (2008)Static Power Consumption in CMOS Gates Using Independent Bodies., , , , , , and . PATMOS, volume 4644 of Lecture Notes in Computer Science, page 404-412. Springer, (2007)Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements., , , , , , and . IES, page 1-7. IEEE, (2006)