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Disambiguation of "Homayoun, Houman"

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Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks.

, , , , and . ISQED, page 499-507. IEEE, (2010)

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Houman Jalaie

Houman Alborzi

Houman Liaghati

Houman Tavassol

Homayoun Tadjadod

 

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ICNN: The Iterative Convolutional Neural Network., , and . ACM Trans. Embed. Comput. Syst., 18 (6): 119:1-119:27 (2020)A+ Tuning: Architecture+Application Auto-Tuning for In-Memory Data-Processing Frameworks., , and . ICPADS, page 163-166. IEEE, (2019)Reducing Execution Unit Leakage Power in Embedded Processors., and . SAMOS, volume 4017 of Lecture Notes in Computer Science, page 299-308. Springer, (2006)Estimating the Circuit Deobfuscating Runtime based on Graph Deep Learning., , , , , , and . CoRR, (2019)Advanced Reinforcement Learning Solution for Clock Skew Engineering: Modified Q-Table Update Technique for Peak Current and IR Drop Minimization., , , , , , , and . IEEE Access, (2023)Breaking the Design and Security Trade-off of Look-up-table-based Obfuscation., , , , , , and . ACM Trans. Design Autom. Electr. Syst., 27 (6): 56:1-56:29 (2022)History & Variation Trained Cache (HVT-Cache): A process variation aware and fine grain voltage scalable cache with active access history monitoring., , , , and . ISQED, page 498-505. IEEE, (2012)Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks., , , , and . ISQED, page 499-507. IEEE, (2010)A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache)., , , and . CASES, page 251-260. ACM, (2009)Large Language Models for Code Analysis: Do LLMs Really Do Their Job?, , , , , , , , , and 1 other author(s). CoRR, (2023)