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Designing parameterized signal processing ips for high level synthesis in a model based design environment., and . CODES+ISSS, page 295-304. ACM, (2012)A software development tool chain for a reconfigurable processor., , and . CASES, page 93-98. ACM, (2001)Wireless Sensor Networks., and . Handbook of Hardware/Software Codesign, (2017)Incremental high-level synthesis., , , , , , and . ASP-DAC, page 701-706. IEEE, (2010)A Framework for Modeling, Simulation and Automatic Code Generation of Sensor Network Application., , , , and . SECON, page 515-522. IEEE, (2008)Software Development for High-Performance, Reconfigurable, Embedded Multimedia Systems., , and . IEEE Des. Test Comput., 22 (1): 28-38 (2005)Quasi-static Scheduling for Concurrent Architectures., , , , and . Fundam. Informaticae, 62 (2): 171-196 (2004)A region-based theory for state assignment in speed-independent circuits., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (8): 793-812 (1997)Testing redundant asynchronous circuits by variable phase splitting., , and . EURO-DAC, page 328-333. IEEE Computer Society, (1994)Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool., , , and . DAC, page 254-260. ACM Press, (1995)