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Disambiguation of "Hattori, Toshihiro"

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Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs.

, , , , , , and . IEEE Des. Test Comput., 24 (1): 83-93 (2007)

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Toshihiro Muramaki

Tomokazu Hattori

Toshihiro Osada

 

Other publications of authors with the same name

Low-power and high-performance technologies for mobile SoC in LTE era.. ISLPED, page 1-2. IEEE/ACM, (2011)Multicore design is the challenge! what is the solution?, , , , , , , and . DAC, page 128-130. ACM, (2008)Power-Management Features of R-Mobile U2, an Integrated Application Processor and Baseband Processor., , , , , , , , , and 5 other author(s). IEEE Micro, 33 (6): 26-36 (2013)A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 44 (1): 83-89 (2009)A 28-nm Automotive Flash Microcontroller With Virtualization-Assisted Processor Supporting ISO26262 ASIL D., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 55 (1): 133-144 (2020)A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture Complying with ISO26262 ASIL-D., , , , , , , , , and 3 other author(s). ISSCC, page 54-56. IEEE, (2019)A 28 nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor With 2 GHz Cores and Low-Power 1 GHz Cores., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 50 (1): 92-101 (2015)Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core., , , , , , , , , and 1 other author(s). IEICE Trans. Electron., 89-C (3): 287-294 (2006)SH-X: an embedded processor core for consumer appliances., , , , , , and . MEDEA@PACT, page 33-40. ACM, (2004)A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption., , , , , , , , , and 4 other author(s). ISSCC, page 100-590. IEEE, (2007)