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A 21-Gb/s 87-mW Transceiver With FFE/DFE/Analog Equalizer in 65-nm CMOS Technology., and . IEEE J. Solid State Circuits, 45 (4): 909-920 (2010)A 20Gb/s Duobinary Transceiver in 90nm CMOS., , and . ISSCC, page 102-103. IEEE, (2008)A 20Gb/s Broadband Transmitter with Auto-Configuration Technique., and . ISSCC, page 444-614. IEEE, (2007)A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver., , , , , , , , , and 8 other author(s). VLSIC, page 1-2. IEEE, (2014)An 87GHz QPSK transceiver with costas-loop carrier recovery in 65nm CMOS., , , , and . ISSCC, page 168-170. IEEE, (2011)Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data., , and . IEEE J. Solid State Circuits, 43 (9): 2120-2133 (2008)W-Band BPSK and QPSK Transceivers With Costas-Loop Carrier Recovery in 65-nm CMOS Technology., , , , and . IEEE J. Solid State Circuits, 46 (12): 3033-3046 (2011)A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology., , and . IEEE J. Solid State Circuits, 43 (6): 1414-1426 (2008)A Visual-Inertial Fusion Mapping and Localization System Using AprilTag in GNSS-Denied Scenes., , , , and . ICIRA (9), volume 14275 of Lecture Notes in Computer Science, page 261-272. Springer, (2023)Study of Subharmonically Injection-Locked PLLs., and . IEEE J. Solid State Circuits, 44 (5): 1539-1553 (2009)