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A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.

C. Ju, T. Liu, H. Wang, Y. Chang, C. Wang, C. Hsieh, B. Liu, H. Lin, C. Cheng, C. Chen, M. Chiu, S. Wang, P. Chao, M. Hu, R. Yeh, T. Chuang, H. Lin, and C. Tsai. VLSIC, page 1-2. IEEE, (2014)

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Chia-Cheng Wu

Yun-Chien Cheng

Cheng-Yung Cheng

Bettina Yunis

Jong-Mo Yun

Other publications of authors with the same name

A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.C. Ju, T. Liu, H. Wang, Y. Chang, C. Wang, C. Hsieh, B. Liu, H. Lin, C. Cheng, C. Chen and 8 other author(s). VLSIC, page 1-2. IEEE, (2014)A multi-format Blu-ray player SoC in 90nm CMOS.C. Ju, T. Liu, C. Yang, S. Lin, K. Lan, C. Wu, T. Wei, C. Lien, J. Wu, C. Hsiao and 34 other author(s). ISSCC, page 152-153. IEEE, (2009)Area and Memory Efficient Architectures for 3D Blu-ray-compliant Multimedia Processors.C. Ju, T. Liu, Y. Chu, C. Chiou, B. Tsai, T. Hsiao, G. Chen, P. Hsu, C. Wang, C. Chen and 8 other author(s). ICME, page 776-781. IEEE Computer Society, (2012)Energy and area efficient hardware implementation of 4K Main-10 HEVC decoder in Ultra-HD Blu-ray player and TV systems.T. Liu, Y. Chang, C. Wang, H. Lin, C. Cheng, C. Chen, M. Chiu, S. Wang, P. Chao, M. Hu and 7 other author(s). ICME, page 1-6. IEEE Computer Society, (2015)A 775-µW/fps/view H.264/MVC decoder chip compliant with 3D Blu-ray specifications.C. Ju, T. Liu, Y. Chang, C. Wang, C. Chen, H. Lin, C. Cheng, M. Chiu, S. Wang, P. Chao and 3 other author(s). ISCAS, page 1440-1443. IEEE, (2012)A 2.6mm2 0.19nJ/pixel VP9 and multi-standard decoder LSI for Android 4K TV applications.C. Ju, T. Liu, Y. Chang, C. Wang, C. Cheng, H. Lin, C. Chen, M. Chiu, P. Chao, M. Wu and 13 other author(s). ESSCIRC, page 109-112. IEEE, (2016)A 0.5 nJ/Pixel 4 K H.265/HEVC Codec LSI for Multi-Format Smartphone Applications.C. Ju, T. Liu, K. Lee, Y. Chang, H. Chou, C. Wang, T. Wu, H. Lin, Y. Huang, C. Cheng and 17 other author(s). IEEE J. Solid State Circuits, 51 (1): 56-67 (2016)A Shoulder Surfing Resistant Graphical Authentication System.H. Sun, S. Chen, J. Yeh, and C. Cheng. IEEE Trans. Dependable Secur. Comput., 15 (2): 180-193 (2018)A 0.2nJ/pixel 4K 60fps Main-10 HEVC decoder with multi-format capabilities for UHD-TV applications.C. Ju, T. Liu, Y. Chang, C. Wang, H. Lin, C. Cheng, C. Chen, M. Chiu, S. Wang, P. Chao and 7 other author(s). ESSCIRC, page 195-198. IEEE, (2014)A 363-µW/fps power-aware green multimedia processor for mobile applications.C. Ju, Y. Chang, C. Wang, C. Chen, H. Lin, C. Cheng, F. Chiu, S. Wang, T. Liu, and C. Tsai. VLSI-DAT, page 1-4. IEEE, (2012)

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Disambiguation of "Cheng, Chia-Yun"

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A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.

Please choose a person to relate this publication to

Chia-Cheng Wu

Yun-Chien Cheng

Cheng-Yung Cheng

Bettina Yunis

Jong-Mo Yun

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Cheng, Chia-Yun"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.

Please choose a person to relate this publication to

Chia-Cheng Wu

Yun-Chien Cheng

Cheng-Yung Cheng

Bettina Yunis

Jong-Mo Yun

Other publications of authors with the same name

Disambiguation

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URL
DOI
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A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.